1. Field of the Invention
The present invention relates generally to a method for identifying slave processors using a master processor and, more particularly, for identifying and communicating with a plurality of slaves in a master-slave system.
2. Description of the Related Art
Various instruments have been developed to measure the flow rate, pH, conductivity, and temperature of a fluid. These measurement instruments typically include a sensor that is attached to a conduit carrying the fluid. The sensor measures the temperature, for example, and transmits an analog or digital signal, representing the temperature, to a receiver. The receiver receives the signal, sends the analog signal to an analog-to-digital converter, which converts the signal to a digital temperature value. The temperature data is then sent to a computer, which receives, evaluates, and displays the data. Depending on the data received, the computer might also transmit a signal back to the instrument to adjust or control the operation of the instrument. A computer might also be located within the instrument to perform certain functions and to receive, evaluate, and display the results. Such microprocessors, computational circuits, and computers will be referred to hereinafter as “processors.”
In designs where the system has a first processor that controls the instrument and a second processor that controls the first processor, the first processor is referred to as a “slave” processor and the second processor is referred to as a “master” processor. The master processor might include a computer, microprocessor, data processing unit, process controller, programmable logic controller, receiver, transmitter, or a combination of these devices. The slave processor likewise might include a computer, microprocessor, data processing unit, process controller, programmable logic controller, digital-to-analog converter, circuit, transistor, flow meter, indicator, receiver, transmitter, sensor, actuator, solenoid valve, measurement equipment, measurement instrument, or a combination of these devices.
FIG. 1 depicts a simplified block diagram of a master-slave system 10, which includes a master processor 12, up to 64 slave processors 14, and a data bus 16 that connects the master processor to the slave processors. The master and slave processors all include a universal asynchronous receiver and transmitter (UART) 18, for transmitting and receiving data. The UART can be realized in hardware, software or a combination of the two. The master and slave processors are configured to pull down, i.e., sink, the data bus. The master processor also includes a pull-up resistor, e.g., 1 kohm, connected to a power supply V, e.g., 5 volts.
The data bus 16 is an asymmetrical two-wire asynchronous half-duplex communication link that operates on a binary level, i.e., low/high signal. A third wire provides power to each of the plurality of slave processors. Power (e.g., 5 volts±0.5 volts) is provided to the third wire by the master processor or a separate power supply. The data bus ground and the power supply ground might be connected to or integral with a cable shield or can be separate from the cable shield depending on the noise conditions. The master-slave system transmits data with active high signals, which are typically logic “1” signals represented by a voltage greater than the systems minimum high level.
When the plurality of slave processors 14 are connected to the data bus 16, it is often desirable to identify and communicate with each slave processor that is connected to the master processor in a simple and efficient manner. One method involves assigning each slave processor a unique ten (10) digit identification code at the time of manufacture of the slave processor. This identification code is permanently stored in the slave processor's memory. The master-slave communication is accomplished by having the master processor 12 transmit a command and a particular slave's unique 10 digit identification code to all of the slave processors. Then, only the slave processor with the matching identification code will respond to the master processor. Hence, the master processor must know all of the slave processors' identification code in their entirety prior to any master-slave communication.
Several other methods have also been developed to perform master-slave communication; however, these methods are considered to be complicated and inefficient. Such methods are described in U.S. Pat. No. 5,210,846 issued on May 11, 1993, U.S. Pat. No. 5,398,326 issued on Mar. 14, 1995, and U.S. Pat. No. 6,108,751 issued on Aug. 22, 2000.
It should therefore be appreciated that there is a need for a method of identifying and communicating with each slave processor in a master-slave system in a simple and efficient manner. The present invention fulfills this need as well as others.